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DEI1117-QES-G

The DEI1116/DEI1117 provides an interface between a standard avionics type serial digital data bus and a 16-bitwide digital data bus. The interface circuit consists of a single channel transmitter with an 8X32 bit buffer, two independent receive channels, and a host programmable control register to select operating options. The two receiver channels operate identically, each providing a direct electrical interface to an ARINC data bus.


Features

  • Two Receivers and One Transmitter
  • 3.3V or 5V supply operation
  • Pin compatible with DEI1016, HI3282 and HI8282A
  • Wraparound Self-Test mode
  • Word length can be configured for 25 bit or 32 bits operation
  • Parity Status and generation of Receive and Transmit Words
  • 8 Word Transmitter buffer
  • Low Power CMOS
  • Supports multiple ARINC protocols: 429, 571, 575, 706
  • Temperature range options: -55/+85° and -55/+125°
  • Package options: 44L MQFP and 44L PLCC
  • Lightning Protection options: DEI1117 operates with 10K Ohm series resistor on A429 inputs.
  • Pin and software compatible with the DEI1016 ARINC 429 Transceiver

Attributes

temp range: -55 to 85
product package type: 44 MQFP2 G
channels: 2
power supply range: 3.35
lightning protection:
Years to EOL: 10
holt x-ref: HI-3282 & HI-8282A
other x-ref pn: DEI1016
ABD0100:
package description: 44L MQFP 10x20x2 body 13.2 footprint RoHS
package type: Surface Mount
package pic: 44L QFP Plastic.png
jedec: DS-MW-01117-01
RoHS: MO-108-AA-1
product status:
Replacement PN: Active

Functional Description

The DEI1116/DEI1117 provides an interface between a standard avionics type serial digital data bus and a 16-bitwide digital data bus. The interface circuit consists of a single channel transmitter with an 8X32 bit buffer, two independent receive channels, and a host programmable control register to select operating options. The two receiver channels operate identically, each providing a direct electrical interface to an ARINC data bus.

The transmitter circuit contains an 8 word by 32 bit buffer memory and control logic which allows the host to write a block of data into the transmitter. The block of data is transmitted automatically by enabling the transmitter with no further attention by the host computer. Data is transmitted in TTL format on the DO(A)/DO(B) output pins. The signal format is compatible with DEI

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